EFFICIENT MLLM
Dynamic LoRA Rank Allocation
Layer-sensitive, budget-aware rank allocation for multimodal large language models, enabling adaptive parameter allocation under a fixed training budget.
QLoRAQuantizationAdaptationLLM
About Me
I am an undergraduate student in Electronic Science and Technology at Beijing University of Technology. My academic interests lie at the intersection of AI systems, GPU computing, hardware acceleration, computer architecture, and multimodal learning.
I am currently a research intern at Shanghai Jiao Tong University, where I work on efficient multimodal learning and parameter-efficient adaptation for large vision-language models. My recent research explores dynamic LoRA rank allocation, multimodal model efficiency, and hardware-aware deployment.
Beyond research, I have gained engineering experience in GPU validation, AI inference deployment, embedded systems, and data-center networking through internships at Glenfly, Lenovo, and Cisco. I am particularly interested in bridging algorithmic efficiency with practical system and hardware constraints.
Education
Beijing University of Technology
B.S. in Electronic Science and Technology · 2023–2027
3.76 / 4.00GPA
88.7 / 100Overall Average
93.12 / 100Junior Year
Selected coursework
Advanced Mathematics (100), Control Systems (99), Deep Learning (98), RF Integrated Circuit Design (97), Microcontroller Systems (97), General Physics (97), Electronic Materials and Devices (96), Digital Integrated Circuit Design (95).
Language (IELTS)
7.5 / 9.0Overall
8.0 / 9.0Listening
8.5 / 9.0Reading
Research & Projects
FPGA / EMBEDDED SYSTEMS
Remote FPGA Laboratory Platform
Built a remote FPGA laboratory platform integrating FPGA, STM32, Raspberry Pi, and ADC/DAC modules for remote programming, signal acquisition, and hardware debugging.
FPGASTM32Raspberry PiSystem
GPU AUTOMATION
Visual Validation Automation
Developed a vision-based automation pipeline for repetitive GPU validation across multiple DPI settings, improving workflow consistency and efficiency.
GPUComputer VisionDexiNedSAM
Publications
ICCECT
A Communication-Efficient Compression Method for FedDyn Federated Learning Models
Published in IEEE Xplore
Industry Experience
Glenfly
Software Development Intern · Shanghai, China
- Conducted functional, stress, stability, and compatibility testing on GPUs across system-level workloads and graphics/compute APIs.
- Performed repeated workload validation and failure reproduction to evaluate driver compatibility and platform stability.
- Developed a desktop-folder detection pipeline using DexiNed and SAM for repetitive validation workflows across multiple DPI settings.
Cisco
Technical Engineer Intern · Beijing, China
- Investigated AI data-center networking for distributed GPU training, including RDMA, RoCEv2, ECN/PFC, and Leaf-Spine architectures.
- Supported validation of switches and optical modules in data-center scenarios.
- Configured and validated BGP, OSPF, VLAN, STP, and ACL environments for protocol verification and troubleshooting.
Lenovo
Embedded Algorithm Engineer · Beijing, China
- Developed Stable Diffusion 3 inference pipelines for text-to-image, image-to-image, and inpainting with SAM/SAM2.
- Built a large-scale data-processing pipeline and trained ControlNet on image-mask-prompt triplets.
- Converted SD3 + ControlNet from PyTorch to OpenVINO and deployed the pipeline on Intel GPUs.
Life Outside the Lab
Guitar
Football
Travel
